The present invention relates to a method for manufacturing a bump on a semiconductor device. More particularly, the present invention relates to a simplified method for manufacturing a chip bump, which enables optional selection of an etching method, as necessary, to remove a barrier metal from a predetermined region after bump formation.
With advancements in semiconductor manufacturing techniques, semiconductor devices have become more and more densely packaged. At the same time, the need for the miniaturization of electronic components and the need for improved operating speed have necessitated not only larger chips, but also smaller and thinner packages. These are, of course, conflicting requirements.
As a first step in an exemplary, conventional method for manufacturing a semiconductor device satisfying these requirements, a bump is formed on a metal pad on the semiconductor chip. A next step, a supporting lead of a lead frame is attached to the bump by a thermo-compression method to thereby obtain an assembly. Two assemblies are positioned at the upper and lower side with the lead frame at the center position, and the supporting leads are bent and formed to connect to each lead frame. This connection is completed using resin.
Gold, copper or solder may be used as a material for manufacturing the bump. Among these, gold is the most desirable material due to its high conductivity and corrosion resistance. Recently, however, copper bumps and solder bumps have been used to achieve cost reduction. In the case of a solder bump, electroplating, evaporation, or dipping in a solder bath is used.
Several conventional methods for manufacturing a mushroom-type chip bump having a recessed lower portion have been suggested. Three such methods are illustrated in FIG. 1, FIG. 3 and FIG. 4, respectively. Among these, the method illustrated in FIG. 1 is the most widely applied. This method includes the steps of depositing a barrier metal layer (100), forming a first photoresist pattern using photolithography (101), electroplating a bump on the photoresist pattern (102), removing the photoresist (103), forming a second photoresist pattern over the bump (104), etching exposed portions of the barrier metal layer (105), removing the second photoresist pattern (106), and heat treating the resulting structure (107). The method of FIG. 1 will be described in greater detail by referring to FIGS. 2A through 2E.
Referring to FIG. 2A, in order to manufacture a bump, a barrier metal layer 5 is deposited on the surface of a substrate composed of a silicon layer 1, a silicon oxide layer 2, a metal layer (aluminum) 3, and a protective layer 4. As shown in FIG. 2B, a plating pattern is then formed by a photolithography process step using a first photoresist layer 6. A bump 7 is formed in the pattern by means of an electroplating process step on metal layer 3 using barrier metal layer 5 as one electrode. Referring to FIGS. 2C and 2D, after the unnecessary portion of first photoresist layer 6 is removed, and a second photoresist layer 11 is formed to cover the bump and the immediately surrounding area. Then, the exposed portions of barrier metal layer 5 are removed through etching. As shown in FIG. 2E, the chip bump is completed after removing second photoresist layer 11.
However, since adhesion between the barrier metal layer 5 and bump 7 is weak, heat treatment process step is performed at a temperature in the range of from 200.degree. to 300.degree. C. This heat treatment step is preferably carried out after completion of the electroplating process. Heat treatment helps prevent separation of a weakly adhered bump 7 from the barrier metal layer 5 during subsequent processing.
The foregoing method for manufacturing a chip bump suffers from several problems. For example, since barrier metal layer 5 is etched using bump 7 as at least a partial mask, high resolution can not be obtained. Moreover, since the photolithography step performed to etch the barrier metal layer 5 is performed after the bump is formed, the second photoresist layer 11 around the bump is relatively thick. This excessive thickness results in various process deficiencies in the exposing dosage and development of the etchant. This results in potential for shorts between adjacent bumps.
The other conventional method of manufacture illustrated in FIGS. 3 and 4 are nearly the same as that described above with respect to FIG. 1.
In the process illustrated in FIG. 3 is the same as that in FIG. 1 through the step of removing the first photoresist layer, i.e., step 100, 101, 102, and 103 are the same. After forming the bump and removing the first photoresist layer, the barrier metal layer is removed through etching using the bump as a mask without the additional steps required to form and remove the second photoresist layer 110. That is, after forming the bump according to the process of FIG. 1, the barrier metal layer is not removed using a patterned, second photoresist layer. Only the bump serves as a mask. The resulting structure is heat treated (111).
According to the method for manufacturing illustrated in FIG. 4, a first barrier metal layer overlaying a second barrier layer are deposited on the surface of a protective layer (120). A patterned photoresist layer is then formed on the upper (first) barrier metal layer (121). Then, a predetermined (exposed) portion of the first barrier metal layer is removed through an etching photolithography process step (122). Thereafter, a bump is formed using a electroplating process step and using the remaining portion of the first barrier metal layer as an electrode. The subprocess includes the steps of photoresist coating (123), photolithography (124), electroplating (125), and photoresist removal (126). The second barrier metal layer is etched using the patterned first barrier metal layer as a mask for etching (127). Finally the resulting structure is heat treated (128).
If the metals used in the first and second barrier metal layers are properly selected, corrosion by the respective etching solutions is prevented. For example, acceptable results can be obtained with the selection of barrier layer metal combinations of Ti--Pd or Ti--Cu. However, for a choice of Cr--Cu barrier metal layers, the copper may be etched by the etching solution intended for the chromium. To overcome this problem, a thick copper layer may be used or a third metal layer (e.g., a gold flash layer) can be formed over the copper layer.
Since only the first barrier metal layer is used as an electrode during the electroplating process step of forming a bump in the method illustrated in FIG. 4, variations in the height of the bump between the central and periphery portions of the wafer are easily induced. Since the first barrier metal layer is typically formed of relatively high-resistant materials (Ti, Cr, etc.), the change in bump height becomes a problem especially in the case of large wafers.
Multiple problems are apparent in the conventional methods of manufacturing a bump, such as the methods described above with respect to FIGS. 1-4. (These methods are characterized by the absence of an additional metal layer serving as an electrode in the electroplating step). For example, a side etching of the bump occurs during the barrier metal layer etching step if a wet etching process is used. Similarly the lower barrier metal layer is damaged if dry etching process is used.
An exemplary conventional method of manufacturing a bump, wherein a metal layer conducting wire used as an electrode in the electroplating process step is illustrated in FIGS. 5A-5E. In FIGS. 5A-5E, like reference numbers refer to like elements previously described with respect to FIGS. 2A-2E.
In FIG. 5A, barrier metal layer 5 is formed as previously described. Barrier metal layer 5 is etched using a first patterned photoresist layer 12 as a mask. As shown in FIG. 5B, the first photoresist layer 12 is then removed. Thereafter, metal layer 8, used as a conducting wire in the electroplating process step, is formed on the etched surface of barrier layer 5 and the exposed portions of protective layer 4. A patterned second photoresist layer 13 is then applied, and a bump 7 is formed using second photoresist layer 13. See FIG. 5C. The metal layer conductive wiring 8 is then etched in FIG. 5D to obtain a chip bump shown in FIG. 5E.
This method of manufacturing bumps using a metal layer conducting wire requires an undue number of manufacturing steps to deposit the metal layer conducting wire. The complexity of these steps greatly increases the manufacturing costs of the finished product.